MAX 10参考设计电路|FPGA应用电路
MAX10特性:可级联块,用于创建RAM、双端口、及FIFO功能;12位逐次逼近寄存器(SAR)类型;高达每秒830兆位(Mbps)的LVDS接收机,800;支持高达600Mbps的外部存储接口
MAX10典型应用范围:工业与汽车;有线/无线通讯;消费者;计算机存储;广播;军事MAX10参考设计应用电路:
图1MAX10内部结构图
MAX 10 devices support up to 144 embedded multiplier blocks. Each block supports one individual 18 × 18-bit multiplier or two individual 9 × 9-bit multipliers. With the combination of on-chip resources and external interfaces in MAX 10 devices, you can build DSP systems with high performance, low system cost, and low power consumption. You can use the MAX 10 device on its own or as a DSP device co-processor to improve price-to-performance ratios of DSP systems.
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